My Erdös number
is at most four.
Erdös Path 1
- "Minimum-diameter cyclic arrangements in mapping data-flow graphs onto VLSI arrays" by P. Erdös, I. Koren, S. Moran, G.M. Silberman, and S. Zaks. In Math. Systems Theory, 1988, Volume 21, Number 2, 85-98.
Dhiraj K. Pradhan
co-authored with Israel Koren
- "Modeling the Effect of Redundancy on Yield and Performance of VLSI Systems" by Israel Koren and Dhiraj K. Pradhan. In IEEE Trans. Computers, 1987, Volume 36, Number 3, 344-355.
co-authored with Dhiraj K. Pradhan
- See the DBLP Computer Science Bibliography.
I co-authored with Nitin Vaidya
- See my publications.
Erdös Path 2
- "Intersection properties of families containing sets of nearly the same size" by P. Erdös, R. Silverman, and A. Stein. In Ars Combin., 1983, Volume 15, 247-259.
co-authored with Ruth Silverman
- "The 1998 NSF Workshop on Teaching Simulation to Undergraduate Computer Science Majors" by William Yurcik and Ruth Silverman. In Summer Computer Simulation Conference, 2000.
co-authored with William Yurcik
- "Log Correlation for Intrusion Detection: A Proof of Concept" by Cristina Abad, Jed Taylor, Cigdem Sengul, William Yurcik, Yuanyuan Zhou and Ken Rowe. In Proceedings of the 19th Annual Computer Security Applications Conference (ACSAC), 2003.
I co-authored with Cigdem Sengul
- "Exploring the Energy-Latency Trade-off for Broadcasts in Energy-Saving Sensor Networks" by Matthew J. Miller, Cigdem Sengul, and Indranil Gupta In The 25th IEEE International Conference on Distributed Computing Systems (ICDCS 2005), 2005.